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![]() The IBM PPE42 processors support a 32-bit decrementer that can raise an external interrupt when DEC[0] transitions from a 0 to a -1 (a non-negative value to a negative value). It also continues decrementing even after this condition is met. The BookE timer is slightly different in that it raises an interrupt when the DEC value reaches 0 and stops decrementing at that point. Support a PPE42 version of the BookE timer by adding a new PPC_TIMER_PPE flag that has the timer code look for the transition from a non-negative value to a negative value and allows the value to continue decrementing. Signed-off-by: Glenn Miles <milesg@linux.ibm.com> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Link: https://lore.kernel.org/r/20250925201758.652077-8-milesg@linux.ibm.com Message-ID: <20250925201758.652077-8-milesg@linux.ibm.com> |
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mac_dbdma.h | 5 months ago | |
openpic.h | ||
openpic_kvm.h | ||
pnv.h | 4 days ago | |
pnv_adu.h | 1 year ago | |
pnv_chip.h | 4 days ago | |
pnv_chiptod.h | 4 days ago | |
pnv_core.h | 1 year ago | |
pnv_homer.h | 7 months ago | |
pnv_i2c.h | ||
pnv_lpc.h | 5 months ago | |
pnv_n1_chiplet.h | 2 years ago | |
pnv_nest_pervasive.h | ||
pnv_occ.h | 5 months ago | |
pnv_pnor.h | 7 months ago | |
pnv_psi.h | 1 year ago | |
pnv_sbe.h | 5 months ago | |
pnv_xive.h | 1 year ago | |
pnv_xscom.h | 4 days ago | |
ppc.h | 4 days ago | |
ppc4xx.h | 5 months ago | |
ppc_e500.h | ||
spapr.h | 7 months ago | |
spapr_cpu_core.h | 11 months ago | |
spapr_drc.h | 10 months ago | |
spapr_irq.h | 1 year ago | |
spapr_nested.h | 7 months ago | |
spapr_numa.h | ||
spapr_nvdimm.h | ||
spapr_ovec.h | ||
spapr_tpm_proxy.h | ||
spapr_vio.h | 10 months ago | |
spapr_xive.h | ||
vof.h | 5 months ago | |
xics.h | 5 months ago | |
xics_spapr.h | ||
xive.h | 2 months ago | |
xive2.h | 2 months ago | |
xive2_regs.h | 2 months ago | |
xive_regs.h | 7 months ago |