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7e65aa39b3
According to the AST2700 design, the data source address is 64-bit, with R_HASH_SRC_HI storing bits [63:32] and R_HASH_SRC storing bits [31:0]. Similarly, the digest address is 64-bit, with R_HASH_DEST_HI storing bits [63:32] and R_HASH_DEST storing bits [31:0]. To maintain compatibility with older SoCs such as the AST2600, the AST2700 HW automatically set bit 34 of the 64-bit sg_addr. As a result, the firmware only needs to provide a 32-bit sg_addr containing bits [31:0]. This is sufficient for the AST2700, as it uses a DRAM offset rather than a DRAM address. Introduce a has_dma64 class attribute and set it to true for the AST2700. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250515081008.583578-15-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com> |
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| xlnx-versal-cfu.h | 1 year ago | |
| xlnx-versal-crl.h | 1 year ago | |
| xlnx-versal-pmc-iou-slcr.h | 2 years ago | |
| xlnx-versal-trng.h | 9 months ago | |
| xlnx-versal-xramc.h | 4 years ago | |
| xlnx-zynqmp-apu-ctrl.h | 3 years ago | |
| xlnx-zynqmp-crf.h | 3 years ago | |