mirror of https://gitlab.com/qemu-project/qemu
You cannot select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
404e75343c
It set "aspeed_gpio_ops" struct which containing read and write callbacks to be used when I/O is performed on the GPIO region. Besides, in the previous design of ASPEED SOCs, one register is used for setting one function for 32 GPIO pins. ex: GPIO000 is used for setting data value for GPIO A, B, C and D in AST2600. ex: GPIO004 is used for setting direction for GPIO A, B, C and D in AST2600. However, the register set have a significant change in AST2700. Each GPIO pin has their own control register. In other words, users are able to set one GPIO pin’s direction, interrupt enable, input mask and so on in one register. The aspeed_gpio_read/aspeed_gpio_write callback functions are not compatible AST2700. Introduce a new "const MemoryRegionOps *" attribute in AspeedGPIOClass and use it in aspeed_gpio_realize function. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> |
3 months ago | |
|---|---|---|
| .. | ||
| aspeed_gpio.h | 3 months ago | |
| bcm2835_gpio.h | ||
| bcm2838_gpio.h | ||
| imx_gpio.h | ||
| npcm7xx_gpio.h | ||
| nrf51_gpio.h | ||
| pca9552.h | 10 months ago | |
| pca9552_regs.h | 10 months ago | |
| pca9554.h | 10 months ago | |
| pca9554_regs.h | 10 months ago | |
| pcf8574.h | ||
| sifive_gpio.h | ||
| stm32l4x5_gpio.h | ||