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qemu/include/hw/cxl
Shiju Jose d1853190db hw/cxl/cxl-mailbox-utils: Fix for device DDR5 ECS control feature tables
CXL spec 3.1 section 8.2.9.9.11.2 describes the DDR5 Error Check Scrub (ECS)
control feature.

ECS log capabilities field in following ECS tables, which is common for all
memory media FRUs in a CXL device.

Fix struct CXLMemECSReadAttrs and struct CXLMemECSWriteAttrs to make
log entry type field common.

Fixes: 2d41ce38fb ("hw/cxl/cxl-mailbox-utils: Add device DDR5 ECS control feature")
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20241014121902.2146424-6-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
1 month ago
..
cxl.h hw/cxl/mbox: Add Physical Switch Identify command. 1 year ago
cxl_cdat.h hw/mem/cxl_type3: Fix problem with g_steal_pointer() 9 months ago
cxl_component.h hw/cxl/cxl-cdat: Make cxl_doe_cdat_init() return boolean 7 months ago
cxl_device.h hw/cxl/cxl-mailbox-utils: Fix for device DDR5 ECS control feature tables 1 month ago
cxl_events.h hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents 5 months ago
cxl_host.h hw/cxl: Clean up includes 2 years ago
cxl_mailbox.h cxl/mailbox: move mailbox effect definitions to a header 5 months ago
cxl_pci.h hw/cxl: Fix missing reserved data in CXL Device DVSEC 9 months ago