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227 lines
5.4 KiB
C
227 lines
5.4 KiB
C
/*
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* USB xHCI controller emulation
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*
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* Copyright (c) 2011 Securiforest
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* Date: 2011-05-11 ; Author: Hector Martin <hector@marcansoft.com>
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* Based on usb-ohci.c, emulates Renesas NEC USB 3.0
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_USB_HCD_XHCI_H
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#define HW_USB_HCD_XHCI_H
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#include "qom/object.h"
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#include "hw/usb.h"
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#include "hw/usb/xhci.h"
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#include "sysemu/dma.h"
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OBJECT_DECLARE_SIMPLE_TYPE(XHCIState, XHCI)
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/* Very pessimistic, let's hope it's enough for all cases */
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#define EV_QUEUE (((3 * 24) + 16) * XHCI_MAXSLOTS)
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typedef struct XHCIStreamContext XHCIStreamContext;
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typedef struct XHCIEPContext XHCIEPContext;
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enum xhci_flags {
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XHCI_FLAG_ENABLE_STREAMS = 1,
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};
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typedef enum TRBType {
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TRB_RESERVED = 0,
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TR_NORMAL,
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TR_SETUP,
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TR_DATA,
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TR_STATUS,
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TR_ISOCH,
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TR_LINK,
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TR_EVDATA,
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TR_NOOP,
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CR_ENABLE_SLOT,
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CR_DISABLE_SLOT,
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CR_ADDRESS_DEVICE,
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CR_CONFIGURE_ENDPOINT,
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CR_EVALUATE_CONTEXT,
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CR_RESET_ENDPOINT,
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CR_STOP_ENDPOINT,
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CR_SET_TR_DEQUEUE,
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CR_RESET_DEVICE,
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CR_FORCE_EVENT,
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CR_NEGOTIATE_BW,
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CR_SET_LATENCY_TOLERANCE,
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CR_GET_PORT_BANDWIDTH,
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CR_FORCE_HEADER,
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CR_NOOP,
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ER_TRANSFER = 32,
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ER_COMMAND_COMPLETE,
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ER_PORT_STATUS_CHANGE,
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ER_BANDWIDTH_REQUEST,
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ER_DOORBELL,
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ER_HOST_CONTROLLER,
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ER_DEVICE_NOTIFICATION,
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ER_MFINDEX_WRAP,
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/* vendor specific bits */
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CR_VENDOR_NEC_FIRMWARE_REVISION = 49,
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CR_VENDOR_NEC_CHALLENGE_RESPONSE = 50,
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} TRBType;
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typedef enum TRBCCode {
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CC_INVALID = 0,
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CC_SUCCESS,
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CC_DATA_BUFFER_ERROR,
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CC_BABBLE_DETECTED,
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CC_USB_TRANSACTION_ERROR,
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CC_TRB_ERROR,
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CC_STALL_ERROR,
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CC_RESOURCE_ERROR,
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CC_BANDWIDTH_ERROR,
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CC_NO_SLOTS_ERROR,
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CC_INVALID_STREAM_TYPE_ERROR,
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CC_SLOT_NOT_ENABLED_ERROR,
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CC_EP_NOT_ENABLED_ERROR,
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CC_SHORT_PACKET,
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CC_RING_UNDERRUN,
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CC_RING_OVERRUN,
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CC_VF_ER_FULL,
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CC_PARAMETER_ERROR,
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CC_BANDWIDTH_OVERRUN,
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CC_CONTEXT_STATE_ERROR,
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CC_NO_PING_RESPONSE_ERROR,
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CC_EVENT_RING_FULL_ERROR,
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CC_INCOMPATIBLE_DEVICE_ERROR,
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CC_MISSED_SERVICE_ERROR,
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CC_COMMAND_RING_STOPPED,
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CC_COMMAND_ABORTED,
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CC_STOPPED,
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CC_STOPPED_LENGTH_INVALID,
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CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29,
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CC_ISOCH_BUFFER_OVERRUN = 31,
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CC_EVENT_LOST_ERROR,
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CC_UNDEFINED_ERROR,
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CC_INVALID_STREAM_ID_ERROR,
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CC_SECONDARY_BANDWIDTH_ERROR,
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CC_SPLIT_TRANSACTION_ERROR
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} TRBCCode;
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typedef struct XHCIRing {
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dma_addr_t dequeue;
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bool ccs;
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} XHCIRing;
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typedef struct XHCIPort {
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XHCIState *xhci;
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uint32_t portsc;
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uint32_t portnr;
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USBPort *uport;
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uint32_t speedmask;
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char name[20];
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MemoryRegion mem;
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} XHCIPort;
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typedef struct XHCISlot {
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bool enabled;
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bool addressed;
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uint16_t intr;
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dma_addr_t ctx;
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USBPort *uport;
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XHCIEPContext *eps[31];
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} XHCISlot;
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typedef struct XHCIEvent {
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TRBType type;
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TRBCCode ccode;
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uint64_t ptr;
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uint32_t length;
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uint32_t flags;
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uint8_t slotid;
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uint8_t epid;
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} XHCIEvent;
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typedef struct XHCIInterrupter {
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uint32_t iman;
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uint32_t imod;
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uint32_t erstsz;
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uint32_t erstba_low;
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uint32_t erstba_high;
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uint32_t erdp_low;
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uint32_t erdp_high;
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bool msix_used, er_pcs;
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dma_addr_t er_start;
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uint32_t er_size;
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unsigned int er_ep_idx;
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/* kept for live migration compat only */
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bool er_full_unused;
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XHCIEvent ev_buffer[EV_QUEUE];
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unsigned int ev_buffer_put;
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unsigned int ev_buffer_get;
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} XHCIInterrupter;
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typedef struct XHCIState {
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DeviceState parent;
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USBBus bus;
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MemoryRegion mem;
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MemoryRegion *dma_mr;
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AddressSpace *as;
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MemoryRegion mem_cap;
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MemoryRegion mem_oper;
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MemoryRegion mem_runtime;
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MemoryRegion mem_doorbell;
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/* properties */
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uint32_t numports_2;
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uint32_t numports_3;
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uint32_t numintrs;
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uint32_t numslots;
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uint32_t flags;
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uint32_t max_pstreams_mask;
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void (*intr_update)(XHCIState *s, int n, bool enable);
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bool (*intr_raise)(XHCIState *s, int n, bool level);
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DeviceState *hostOpaque;
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/* Operational Registers */
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uint32_t usbcmd;
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uint32_t usbsts;
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uint32_t dnctrl;
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uint32_t crcr_low;
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uint32_t crcr_high;
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uint32_t dcbaap_low;
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uint32_t dcbaap_high;
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uint32_t config;
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USBPort uports[MAX_CONST(XHCI_MAXPORTS_2, XHCI_MAXPORTS_3)];
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XHCIPort ports[XHCI_MAXPORTS];
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XHCISlot slots[XHCI_MAXSLOTS];
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uint32_t numports;
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/* Runtime Registers */
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int64_t mfindex_start;
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QEMUTimer *mfwrap_timer;
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XHCIInterrupter intr[XHCI_MAXINTRS];
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XHCIRing cmd_ring;
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bool nec_quirks;
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} XHCIState;
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extern const VMStateDescription vmstate_xhci;
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bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit);
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void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit);
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#endif
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