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57 lines
1.9 KiB
C
57 lines
1.9 KiB
C
/*
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* LASI Wrapper for NCR710 SCSI Controller
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*
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* Copyright (c) 2025 Soumyajyotii Ssarkar <soumyajyotisarkar23@gmail.com>
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* This driver was developed during the Google Summer of Code 2025 program.
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* Mentored by Helge Deller <deller@gmx.de>
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*
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* NCR710 SCSI Controller implementation
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* Based on the NCR53C710 Technical Manual Version 3.2, December 2000
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#ifndef HW_LASI_NCR710_H
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#define HW_LASI_NCR710_H
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#include "hw/sysbus.h"
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#include "qemu/osdep.h"
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#include "exec/memattrs.h"
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#include "hw/scsi/scsi.h"
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#include "hw/scsi/ncr53c710.h"
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#define TYPE_LASI_NCR710 "lasi-ncr710"
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OBJECT_DECLARE_SIMPLE_TYPE(LasiNCR710State, LASI_NCR710)
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#define LASI_SCSI_RESET 0x000 /* SCSI Reset Register */
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#define LASI_SCSI_NCR710_BASE 0x100 /* NCR710 Base Register Offset */
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#define PARISC_DEVICE_ID_OFF 0x00 /* HW type, HVERSION, SVERSION */
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#define PARISC_DEVICE_CONFIG_OFF 0x04 /* Configuration data */
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#define PHASE_MASK 7
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#define PHASE_DO 0
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#define NCR710_SCNTL1_RST 0x08 /* SCSI Reset */
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#define NCR710_ISTAT_RST 0x40 /* Device Reset */
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#define NCR710_ISTAT_ABRT 0x80 /* Script Abort */
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#define NCR710_ISTAT_CON 0x08 /* ISTAT_Connected */
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#define NCR710_DSTAT_DFE 0x80 /* DMA FIFO Empty */
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#define NCR710_CTEST2_DACK 0x01 /* DMA Acknowledge */
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typedef struct LasiNCR710State {
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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qemu_irq lasi_irq; /* IRQ line to LASI controller */
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uint32_t hw_type; /* Hardware type (HPHW_*) */
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uint32_t sversion; /* Software version */
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uint32_t hversion; /* Hardware version */
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NCR710State ncr710;
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} LasiNCR710State;
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DeviceState *lasi_ncr710_init(MemoryRegion *addr_space, hwaddr hpa,
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qemu_irq irq);
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void lasi_ncr710_handle_legacy_cmdline(DeviceState *lasi_dev);
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#endif
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