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659 lines
24 KiB
C
659 lines
24 KiB
C
/*
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* QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
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*
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* PCI bus layout on a real G5 (U3 based):
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*
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* 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
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* 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
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* 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
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* 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
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* 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
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* 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
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* 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
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* 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
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* 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
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* 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
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* 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
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* 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
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* 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
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* 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
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* 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
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* 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
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* 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
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* 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
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* 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
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* 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
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*/
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#include "qemu/osdep.h"
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#include "qemu/datadir.h"
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#include "qemu/units.h"
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#include "qapi/error.h"
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#include "hw/ppc/ppc.h"
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#include "hw/qdev-properties.h"
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#include "hw/nvram/mac_nvram.h"
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#include "hw/boards.h"
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#include "hw/pci-host/uninorth.h"
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#include "hw/input/adb.h"
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#include "hw/ppc/mac_dbdma.h"
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#include "hw/pci/pci.h"
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#include "net/net.h"
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#include "sysemu/sysemu.h"
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#include "hw/nvram/fw_cfg.h"
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#include "hw/char/escc.h"
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#include "hw/misc/macio/macio.h"
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#include "hw/ppc/openpic.h"
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#include "hw/loader.h"
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#include "hw/fw-path-provider.h"
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#include "elf.h"
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#include "qemu/error-report.h"
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#include "sysemu/kvm.h"
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#include "sysemu/reset.h"
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#include "kvm_ppc.h"
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#include "hw/usb.h"
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#include "hw/sysbus.h"
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#include "trace.h"
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#define MAX_IDE_BUS 2
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#define CFG_ADDR 0xf0000510
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#define TBFREQ (25UL * 1000UL * 1000UL)
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#define CLOCKFREQ (900UL * 1000UL * 1000UL)
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#define BUSFREQ (100UL * 1000UL * 1000UL)
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#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
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#define PROM_FILENAME "openbios-ppc"
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#define PROM_BASE 0xfff00000
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#define PROM_SIZE (1 * MiB)
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#define KERNEL_LOAD_ADDR 0x01000000
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#define KERNEL_GAP 0x00100000
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#define TYPE_CORE99_MACHINE MACHINE_TYPE_NAME("mac99")
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typedef struct Core99MachineState Core99MachineState;
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DECLARE_INSTANCE_CHECKER(Core99MachineState, CORE99_MACHINE,
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TYPE_CORE99_MACHINE)
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typedef enum {
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CORE99_VIA_CONFIG_CUDA = 0,
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CORE99_VIA_CONFIG_PMU,
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CORE99_VIA_CONFIG_PMU_ADB
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} Core99ViaConfig;
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struct Core99MachineState {
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/*< private >*/
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MachineState parent;
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Core99ViaConfig via_config;
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};
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static void fw_cfg_boot_set(void *opaque, const char *boot_device,
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Error **errp)
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{
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fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
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}
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static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
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{
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return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
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}
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static void ppc_core99_reset(void *opaque)
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{
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PowerPCCPU *cpu = opaque;
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cpu_reset(CPU(cpu));
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/* 970 CPUs want to get their initial IP as part of their boot protocol */
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cpu->env.nip = PROM_BASE + 0x100;
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}
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/* PowerPC Mac99 hardware initialisation */
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static void ppc_core99_init(MachineState *machine)
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{
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Core99MachineState *core99_machine = CORE99_MACHINE(machine);
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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PowerPCCPU *cpu = NULL;
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CPUPPCState *env = NULL;
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char *filename;
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IrqLines *openpic_irqs;
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int i, j, k, ppc_boot_device, machine_arch, bios_size = -1;
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const char *bios_name = machine->firmware ?: PROM_FILENAME;
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MemoryRegion *bios = g_new(MemoryRegion, 1);
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hwaddr kernel_base = 0, initrd_base = 0, cmdline_base = 0;
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long kernel_size = 0, initrd_size = 0;
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PCIBus *pci_bus;
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bool has_pmu, has_adb;
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Object *macio;
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MACIOIDEState *macio_ide;
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BusState *adb_bus;
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MacIONVRAMState *nvr;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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void *fw_cfg;
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SysBusDevice *s;
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DeviceState *dev, *pic_dev, *uninorth_pci_dev;
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DeviceState *uninorth_internal_dev = NULL, *uninorth_agp_dev = NULL;
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hwaddr nvram_addr = 0xFFF04000;
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uint64_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TBFREQ;
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/* init CPUs */
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for (i = 0; i < machine->smp.cpus; i++) {
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cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
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env = &cpu->env;
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/* Set time-base frequency to 100 Mhz */
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cpu_ppc_tb_init(env, TBFREQ);
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qemu_register_reset(ppc_core99_reset, cpu);
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}
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/* allocate RAM */
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if (machine->ram_size > 2 * GiB) {
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error_report("RAM size more than 2 GiB is not supported");
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exit(1);
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}
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memory_region_add_subregion(get_system_memory(), 0, machine->ram);
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/* allocate and load firmware ROM */
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memory_region_init_rom(bios, NULL, "ppc_core99.bios", PROM_SIZE,
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&error_fatal);
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memory_region_add_subregion(get_system_memory(), PROM_BASE, bios);
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
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if (filename) {
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/* Load OpenBIOS (ELF) */
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bios_size = load_elf(filename, NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
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if (bios_size <= 0) {
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/* or load binary ROM image */
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bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
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}
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g_free(filename);
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}
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if (bios_size < 0 || bios_size > PROM_SIZE) {
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error_report("could not load PowerPC bios '%s'", bios_name);
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exit(1);
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}
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if (machine->kernel_filename) {
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int bswap_needed = 0;
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#ifdef BSWAP_NEEDED
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bswap_needed = 1;
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#endif
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kernel_base = KERNEL_LOAD_ADDR;
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kernel_size = load_elf(machine->kernel_filename, NULL,
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translate_kernel_address, NULL, NULL, NULL,
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NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
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if (kernel_size < 0) {
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kernel_size = load_aout(machine->kernel_filename, kernel_base,
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machine->ram_size - kernel_base,
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bswap_needed, TARGET_PAGE_SIZE);
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}
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if (kernel_size < 0) {
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kernel_size = load_image_targphys(machine->kernel_filename,
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kernel_base,
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machine->ram_size - kernel_base);
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}
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if (kernel_size < 0) {
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error_report("could not load kernel '%s'",
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machine->kernel_filename);
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exit(1);
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}
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/* load initrd */
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if (machine->initrd_filename) {
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initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
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initrd_size = load_image_targphys(machine->initrd_filename,
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initrd_base,
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machine->ram_size - initrd_base);
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if (initrd_size < 0) {
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error_report("could not load initial ram disk '%s'",
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machine->initrd_filename);
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exit(1);
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}
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cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
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} else {
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cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
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}
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ppc_boot_device = 'm';
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} else {
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ppc_boot_device = '\0';
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/* We consider that NewWorld PowerMac never have any floppy drive
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* For now, OHW cannot boot from the network.
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*/
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for (i = 0; machine->boot_config.order[i] != '\0'; i++) {
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if (machine->boot_config.order[i] >= 'c' &&
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machine->boot_config.order[i] <= 'f') {
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ppc_boot_device = machine->boot_config.order[i];
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break;
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}
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}
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if (ppc_boot_device == '\0') {
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error_report("No valid boot device for Mac99 machine");
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exit(1);
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}
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}
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openpic_irqs = g_new0(IrqLines, machine->smp.cpus);
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dev = DEVICE(cpu);
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for (i = 0; i < machine->smp.cpus; i++) {
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/* Mac99 IRQ connection between OpenPIC outputs pins
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* and PowerPC input pins
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*/
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switch (PPC_INPUT(env)) {
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case PPC_FLAGS_INPUT_6xx:
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openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
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qdev_get_gpio_in(dev, PPC6xx_INPUT_INT);
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openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
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qdev_get_gpio_in(dev, PPC6xx_INPUT_INT);
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openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
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qdev_get_gpio_in(dev, PPC6xx_INPUT_MCP);
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/* Not connected ? */
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openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
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/* Check this */
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openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
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qdev_get_gpio_in(dev, PPC6xx_INPUT_HRESET);
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break;
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#if defined(TARGET_PPC64)
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case PPC_FLAGS_INPUT_970:
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openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
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qdev_get_gpio_in(dev, PPC970_INPUT_INT);
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openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
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qdev_get_gpio_in(dev, PPC970_INPUT_INT);
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openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
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qdev_get_gpio_in(dev, PPC970_INPUT_MCP);
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/* Not connected ? */
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openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
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/* Check this */
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openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
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qdev_get_gpio_in(dev, PPC970_INPUT_HRESET);
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break;
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#endif /* defined(TARGET_PPC64) */
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default:
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error_report("Bus model not supported on mac99 machine");
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exit(1);
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}
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}
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/* UniN init */
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s = SYS_BUS_DEVICE(qdev_new(TYPE_UNI_NORTH));
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sysbus_realize_and_unref(s, &error_fatal);
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memory_region_add_subregion(get_system_memory(), 0xf8000000,
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sysbus_mmio_get_region(s, 0));
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if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
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machine_arch = ARCH_MAC99_U3;
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/* 970 gets a U3 bus */
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/* Uninorth AGP bus */
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uninorth_pci_dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE);
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s = SYS_BUS_DEVICE(uninorth_pci_dev);
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sysbus_realize_and_unref(s, &error_fatal);
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sysbus_mmio_map(s, 0, 0xf0800000);
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sysbus_mmio_map(s, 1, 0xf0c00000);
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/* PCI hole */
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memory_region_add_subregion(get_system_memory(), 0x80000000,
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sysbus_mmio_get_region(s, 2));
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/* Register 8 MB of ISA IO space */
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memory_region_add_subregion(get_system_memory(), 0xf2000000,
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sysbus_mmio_get_region(s, 3));
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} else {
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machine_arch = ARCH_MAC99;
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/* Use values found on a real PowerMac */
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/* Uninorth AGP bus */
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uninorth_agp_dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
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s = SYS_BUS_DEVICE(uninorth_agp_dev);
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sysbus_realize_and_unref(s, &error_fatal);
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sysbus_mmio_map(s, 0, 0xf0800000);
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sysbus_mmio_map(s, 1, 0xf0c00000);
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/* Uninorth internal bus */
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uninorth_internal_dev = qdev_new(
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TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
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s = SYS_BUS_DEVICE(uninorth_internal_dev);
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sysbus_realize_and_unref(s, &error_fatal);
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sysbus_mmio_map(s, 0, 0xf4800000);
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sysbus_mmio_map(s, 1, 0xf4c00000);
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/* Uninorth main bus - this must be last to make it the default */
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uninorth_pci_dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
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qdev_prop_set_uint32(uninorth_pci_dev, "ofw-addr", 0xf2000000);
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s = SYS_BUS_DEVICE(uninorth_pci_dev);
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sysbus_realize_and_unref(s, &error_fatal);
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sysbus_mmio_map(s, 0, 0xf2800000);
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sysbus_mmio_map(s, 1, 0xf2c00000);
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/* PCI hole */
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memory_region_add_subregion(get_system_memory(), 0x80000000,
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sysbus_mmio_get_region(s, 2));
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/* Register 8 MB of ISA IO space */
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memory_region_add_subregion(get_system_memory(), 0xf2000000,
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sysbus_mmio_get_region(s, 3));
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}
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machine->usb |= defaults_enabled() && !machine->usb_disabled;
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has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
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has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
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core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
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/* init basic PC hardware */
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pci_bus = PCI_HOST_BRIDGE(uninorth_pci_dev)->bus;
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/* MacIO */
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macio = OBJECT(pci_new(-1, TYPE_NEWWORLD_MACIO));
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dev = DEVICE(macio);
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qdev_prop_set_uint64(dev, "frequency", tbfreq);
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qdev_prop_set_bit(dev, "has-pmu", has_pmu);
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qdev_prop_set_bit(dev, "has-adb", has_adb);
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dev = DEVICE(object_resolve_path_component(macio, "escc"));
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qdev_prop_set_chr(dev, "chrA", serial_hd(0));
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qdev_prop_set_chr(dev, "chrB", serial_hd(1));
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pci_realize_and_unref(PCI_DEVICE(macio), pci_bus, &error_fatal);
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pic_dev = DEVICE(object_resolve_path_component(macio, "pic"));
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for (i = 0; i < 4; i++) {
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qdev_connect_gpio_out(uninorth_pci_dev, i,
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qdev_get_gpio_in(pic_dev, 0x1b + i));
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}
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/* TODO: additional PCI buses only wired up for 32-bit machines */
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if (PPC_INPUT(env) != PPC_FLAGS_INPUT_970) {
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/* Uninorth AGP bus */
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for (i = 0; i < 4; i++) {
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qdev_connect_gpio_out(uninorth_agp_dev, i,
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qdev_get_gpio_in(pic_dev, 0x1b + i));
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}
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/* Uninorth internal bus */
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for (i = 0; i < 4; i++) {
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qdev_connect_gpio_out(uninorth_internal_dev, i,
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qdev_get_gpio_in(pic_dev, 0x1b + i));
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}
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}
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/* OpenPIC */
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s = SYS_BUS_DEVICE(pic_dev);
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k = 0;
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for (i = 0; i < machine->smp.cpus; i++) {
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for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
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sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
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}
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}
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g_free(openpic_irqs);
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/* We only emulate 2 out of 3 IDE controllers for now */
|
|
ide_drive_get(hd, ARRAY_SIZE(hd));
|
|
|
|
macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[0]"));
|
|
macio_ide_init_drives(macio_ide, hd);
|
|
|
|
macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[1]"));
|
|
macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
|
|
|
|
if (has_adb) {
|
|
if (has_pmu) {
|
|
dev = DEVICE(object_resolve_path_component(macio, "pmu"));
|
|
} else {
|
|
dev = DEVICE(object_resolve_path_component(macio, "cuda"));
|
|
}
|
|
|
|
adb_bus = qdev_get_child_bus(dev, "adb.0");
|
|
dev = qdev_new(TYPE_ADB_KEYBOARD);
|
|
qdev_realize_and_unref(dev, adb_bus, &error_fatal);
|
|
|
|
dev = qdev_new(TYPE_ADB_MOUSE);
|
|
qdev_realize_and_unref(dev, adb_bus, &error_fatal);
|
|
}
|
|
|
|
if (machine->usb) {
|
|
pci_create_simple(pci_bus, -1, "pci-ohci");
|
|
|
|
/* U3 needs to use USB for input because Linux doesn't support via-cuda
|
|
on PPC64 */
|
|
if (!has_adb || machine_arch == ARCH_MAC99_U3) {
|
|
USBBus *usb_bus;
|
|
|
|
usb_bus = USB_BUS(object_resolve_type_unambiguous(TYPE_USB_BUS,
|
|
&error_abort));
|
|
usb_create_simple(usb_bus, "usb-kbd");
|
|
usb_create_simple(usb_bus, "usb-mouse");
|
|
}
|
|
}
|
|
|
|
pci_vga_init(pci_bus);
|
|
|
|
if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
|
|
graphic_depth = 15;
|
|
}
|
|
|
|
pci_init_nic_devices(pci_bus, mc->default_nic);
|
|
|
|
/* The NewWorld NVRAM is not located in the MacIO device */
|
|
if (kvm_enabled() && qemu_real_host_page_size() > 4096) {
|
|
/* We can't combine read-write and read-only in a single page, so
|
|
move the NVRAM out of ROM again for KVM */
|
|
nvram_addr = 0xFFE00000;
|
|
}
|
|
dev = qdev_new(TYPE_MACIO_NVRAM);
|
|
qdev_prop_set_uint32(dev, "size", MACIO_NVRAM_SIZE);
|
|
qdev_prop_set_uint32(dev, "it_shift", 1);
|
|
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
|
|
nvr = MACIO_NVRAM(dev);
|
|
pmac_format_nvram_partition(nvr, MACIO_NVRAM_SIZE);
|
|
/* No PCI init: the BIOS will do it */
|
|
|
|
dev = qdev_new(TYPE_FW_CFG_MEM);
|
|
fw_cfg = FW_CFG(dev);
|
|
qdev_prop_set_uint32(dev, "data_width", 1);
|
|
qdev_prop_set_bit(dev, "dma_enabled", false);
|
|
object_property_add_child(OBJECT(machine), TYPE_FW_CFG, OBJECT(fw_cfg));
|
|
s = SYS_BUS_DEVICE(dev);
|
|
sysbus_realize_and_unref(s, &error_fatal);
|
|
sysbus_mmio_map(s, 0, CFG_ADDR);
|
|
sysbus_mmio_map(s, 1, CFG_ADDR + 2);
|
|
|
|
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)machine->smp.cpus);
|
|
fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
|
|
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
|
|
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
|
|
if (machine->kernel_cmdline) {
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
|
|
pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE,
|
|
machine->kernel_cmdline);
|
|
} else {
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
|
|
}
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
|
|
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
|
|
|
|
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
|
|
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
|
|
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
|
|
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
|
|
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
|
|
if (kvm_enabled()) {
|
|
uint8_t *hypercall;
|
|
|
|
hypercall = g_malloc(16);
|
|
kvmppc_get_hypercall(env, hypercall, 16);
|
|
fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
|
|
}
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
|
|
/* Mac OS X requires a "known good" clock-frequency value; pass it one. */
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
|
|
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
|
|
|
|
/* MacOS NDRV VGA driver */
|
|
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
|
|
if (filename) {
|
|
gchar *ndrv_file;
|
|
gsize ndrv_size;
|
|
|
|
if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
|
|
fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
|
|
}
|
|
g_free(filename);
|
|
}
|
|
|
|
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
|
|
}
|
|
|
|
/*
|
|
* Implementation of an interface to adjust firmware path
|
|
* for the bootindex property handling.
|
|
*/
|
|
static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
|
|
DeviceState *dev)
|
|
{
|
|
PCIDevice *pci;
|
|
MACIOIDEState *macio_ide;
|
|
|
|
if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
|
|
pci = PCI_DEVICE(dev);
|
|
return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
|
|
}
|
|
|
|
if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
|
|
macio_ide = MACIO_IDE(dev);
|
|
return g_strdup_printf("ata-3@%x", macio_ide->addr);
|
|
}
|
|
|
|
if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
|
|
return g_strdup("disk");
|
|
}
|
|
|
|
if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
|
|
return g_strdup("cdrom");
|
|
}
|
|
|
|
if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
|
|
return g_strdup("disk");
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
static int core99_kvm_type(MachineState *machine, const char *arg)
|
|
{
|
|
/* Always force PR KVM */
|
|
return 2;
|
|
}
|
|
|
|
static void core99_machine_class_init(ObjectClass *oc, void *data)
|
|
{
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
|
|
|
|
mc->desc = "Mac99 based PowerMac";
|
|
mc->init = ppc_core99_init;
|
|
mc->block_default_type = IF_IDE;
|
|
/* SMP is not supported currently */
|
|
mc->max_cpus = 1;
|
|
mc->default_boot_order = "cd";
|
|
mc->default_display = "std";
|
|
mc->default_nic = "sungem";
|
|
mc->kvm_type = core99_kvm_type;
|
|
#ifdef TARGET_PPC64
|
|
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
|
|
#else
|
|
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
|
|
#endif
|
|
mc->default_ram_id = "ppc_core99.ram";
|
|
mc->ignore_boot_device_suffixes = true;
|
|
fwc->get_dev_path = core99_fw_dev_path;
|
|
}
|
|
|
|
static char *core99_get_via_config(Object *obj, Error **errp)
|
|
{
|
|
Core99MachineState *cms = CORE99_MACHINE(obj);
|
|
|
|
switch (cms->via_config) {
|
|
default:
|
|
case CORE99_VIA_CONFIG_CUDA:
|
|
return g_strdup("cuda");
|
|
|
|
case CORE99_VIA_CONFIG_PMU:
|
|
return g_strdup("pmu");
|
|
|
|
case CORE99_VIA_CONFIG_PMU_ADB:
|
|
return g_strdup("pmu-adb");
|
|
}
|
|
}
|
|
|
|
static void core99_set_via_config(Object *obj, const char *value, Error **errp)
|
|
{
|
|
Core99MachineState *cms = CORE99_MACHINE(obj);
|
|
|
|
if (!strcmp(value, "cuda")) {
|
|
cms->via_config = CORE99_VIA_CONFIG_CUDA;
|
|
} else if (!strcmp(value, "pmu")) {
|
|
cms->via_config = CORE99_VIA_CONFIG_PMU;
|
|
} else if (!strcmp(value, "pmu-adb")) {
|
|
cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
|
|
} else {
|
|
error_setg(errp, "Invalid via value");
|
|
error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
|
|
}
|
|
}
|
|
|
|
static void core99_instance_init(Object *obj)
|
|
{
|
|
Core99MachineState *cms = CORE99_MACHINE(obj);
|
|
|
|
/* Default via_config is CORE99_VIA_CONFIG_CUDA */
|
|
cms->via_config = CORE99_VIA_CONFIG_CUDA;
|
|
object_property_add_str(obj, "via", core99_get_via_config,
|
|
core99_set_via_config);
|
|
object_property_set_description(obj, "via",
|
|
"Set VIA configuration. "
|
|
"Valid values are cuda, pmu and pmu-adb");
|
|
|
|
return;
|
|
}
|
|
|
|
static const TypeInfo core99_machine_info = {
|
|
.name = MACHINE_TYPE_NAME("mac99"),
|
|
.parent = TYPE_MACHINE,
|
|
.class_init = core99_machine_class_init,
|
|
.instance_init = core99_instance_init,
|
|
.instance_size = sizeof(Core99MachineState),
|
|
.interfaces = (InterfaceInfo[]) {
|
|
{ TYPE_FW_PATH_PROVIDER },
|
|
{ }
|
|
},
|
|
};
|
|
|
|
static void mac_machine_register_types(void)
|
|
{
|
|
type_register_static(&core99_machine_info);
|
|
}
|
|
|
|
type_init(mac_machine_register_types)
|