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976 lines
28 KiB
C
976 lines
28 KiB
C
/*
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* QEMU PC keyboard emulation
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/error-report.h"
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#include "qemu/log.h"
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#include "qemu/timer.h"
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#include "qapi/error.h"
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#include "hw/isa/isa.h"
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#include "migration/vmstate.h"
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#include "hw/acpi/acpi_aml_interface.h"
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#include "hw/input/ps2.h"
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#include "hw/irq.h"
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#include "hw/input/i8042.h"
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#include "hw/qdev-properties.h"
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#include "sysemu/reset.h"
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#include "sysemu/runstate.h"
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#include "trace.h"
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/* Keyboard Controller Commands */
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/* Read mode bits */
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#define KBD_CCMD_READ_MODE 0x20
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/* Write mode bits */
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#define KBD_CCMD_WRITE_MODE 0x60
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/* Get controller version */
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#define KBD_CCMD_GET_VERSION 0xA1
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/* Disable mouse interface */
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#define KBD_CCMD_MOUSE_DISABLE 0xA7
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/* Enable mouse interface */
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#define KBD_CCMD_MOUSE_ENABLE 0xA8
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/* Mouse interface test */
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#define KBD_CCMD_TEST_MOUSE 0xA9
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/* Controller self test */
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#define KBD_CCMD_SELF_TEST 0xAA
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/* Keyboard interface test */
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#define KBD_CCMD_KBD_TEST 0xAB
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/* Keyboard interface disable */
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#define KBD_CCMD_KBD_DISABLE 0xAD
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/* Keyboard interface enable */
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#define KBD_CCMD_KBD_ENABLE 0xAE
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/* read input port */
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#define KBD_CCMD_READ_INPORT 0xC0
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/* read output port */
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#define KBD_CCMD_READ_OUTPORT 0xD0
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/* write output port */
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#define KBD_CCMD_WRITE_OUTPORT 0xD1
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#define KBD_CCMD_WRITE_OBUF 0xD2
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/* Write to output buffer as if initiated by the auxiliary device */
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#define KBD_CCMD_WRITE_AUX_OBUF 0xD3
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/* Write the following byte to the mouse */
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#define KBD_CCMD_WRITE_MOUSE 0xD4
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/* HP vectra only ? */
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#define KBD_CCMD_DISABLE_A20 0xDD
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/* HP vectra only ? */
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#define KBD_CCMD_ENABLE_A20 0xDF
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/* Pulse bits 3-0 of the output port P2. */
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#define KBD_CCMD_PULSE_BITS_3_0 0xF0
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/* Pulse bit 0 of the output port P2 = CPU reset. */
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#define KBD_CCMD_RESET 0xFE
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/* Pulse no bits of the output port P2. */
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#define KBD_CCMD_NO_OP 0xFF
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/* Status Register Bits */
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/* Keyboard output buffer full */
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#define KBD_STAT_OBF 0x01
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/* Keyboard input buffer full */
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#define KBD_STAT_IBF 0x02
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/* Self test successful */
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#define KBD_STAT_SELFTEST 0x04
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/* Last write was a command write (0=data) */
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#define KBD_STAT_CMD 0x08
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/* Zero if keyboard locked */
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#define KBD_STAT_UNLOCKED 0x10
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/* Mouse output buffer full */
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#define KBD_STAT_MOUSE_OBF 0x20
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/* General receive/xmit timeout */
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#define KBD_STAT_GTO 0x40
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/* Parity error */
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#define KBD_STAT_PERR 0x80
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/* Controller Mode Register Bits */
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/* Keyboard data generate IRQ1 */
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#define KBD_MODE_KBD_INT 0x01
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/* Mouse data generate IRQ12 */
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#define KBD_MODE_MOUSE_INT 0x02
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/* The system flag (?) */
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#define KBD_MODE_SYS 0x04
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/* The keylock doesn't affect the keyboard if set */
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#define KBD_MODE_NO_KEYLOCK 0x08
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/* Disable keyboard interface */
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#define KBD_MODE_DISABLE_KBD 0x10
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/* Disable mouse interface */
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#define KBD_MODE_DISABLE_MOUSE 0x20
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/* Scan code conversion to PC format */
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#define KBD_MODE_KCC 0x40
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#define KBD_MODE_RFU 0x80
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/* Output Port Bits */
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#define KBD_OUT_RESET 0x01 /* 1=normal mode, 0=reset */
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#define KBD_OUT_A20 0x02 /* x86 only */
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#define KBD_OUT_OBF 0x10 /* Keyboard output buffer full */
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#define KBD_OUT_MOUSE_OBF 0x20 /* Mouse output buffer full */
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/*
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* OSes typically write 0xdd/0xdf to turn the A20 line off and on.
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* We make the default value of the outport include these four bits,
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* so that the subsection is rarely necessary.
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*/
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#define KBD_OUT_ONES 0xcc
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#define KBD_PENDING_KBD_COMPAT 0x01
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#define KBD_PENDING_AUX_COMPAT 0x02
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#define KBD_PENDING_CTRL_KBD 0x04
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#define KBD_PENDING_CTRL_AUX 0x08
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#define KBD_PENDING_KBD KBD_MODE_DISABLE_KBD /* 0x10 */
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#define KBD_PENDING_AUX KBD_MODE_DISABLE_MOUSE /* 0x20 */
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#define KBD_MIGR_TIMER_PENDING 0x1
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#define KBD_OBSRC_KBD 0x01
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#define KBD_OBSRC_MOUSE 0x02
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#define KBD_OBSRC_CTRL 0x04
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/*
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* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
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* incorrect, but it avoids having to simulate exact delays
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*/
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static void kbd_update_irq_lines(KBDState *s)
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{
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int irq_kbd_level, irq_mouse_level;
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irq_kbd_level = 0;
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irq_mouse_level = 0;
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if (s->status & KBD_STAT_OBF) {
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if (s->status & KBD_STAT_MOUSE_OBF) {
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if (s->mode & KBD_MODE_MOUSE_INT) {
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irq_mouse_level = 1;
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}
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} else {
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if ((s->mode & KBD_MODE_KBD_INT) &&
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!(s->mode & KBD_MODE_DISABLE_KBD)) {
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irq_kbd_level = 1;
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}
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}
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}
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qemu_set_irq(s->irqs[I8042_KBD_IRQ], irq_kbd_level);
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qemu_set_irq(s->irqs[I8042_MOUSE_IRQ], irq_mouse_level);
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}
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static void kbd_deassert_irq(KBDState *s)
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{
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s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
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s->outport &= ~(KBD_OUT_OBF | KBD_OUT_MOUSE_OBF);
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kbd_update_irq_lines(s);
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}
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static uint8_t kbd_pending(KBDState *s)
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{
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if (s->extended_state) {
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return s->pending & (~s->mode | ~(KBD_PENDING_KBD | KBD_PENDING_AUX));
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} else {
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return s->pending;
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}
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}
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/* update irq and KBD_STAT_[MOUSE_]OBF */
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static void kbd_update_irq(KBDState *s)
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{
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uint8_t pending = kbd_pending(s);
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s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
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s->outport &= ~(KBD_OUT_OBF | KBD_OUT_MOUSE_OBF);
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if (pending) {
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s->status |= KBD_STAT_OBF;
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s->outport |= KBD_OUT_OBF;
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if (pending & KBD_PENDING_CTRL_KBD) {
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s->obsrc = KBD_OBSRC_CTRL;
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} else if (pending & KBD_PENDING_CTRL_AUX) {
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s->status |= KBD_STAT_MOUSE_OBF;
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s->outport |= KBD_OUT_MOUSE_OBF;
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s->obsrc = KBD_OBSRC_CTRL;
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} else if (pending & KBD_PENDING_KBD) {
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s->obsrc = KBD_OBSRC_KBD;
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} else {
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s->status |= KBD_STAT_MOUSE_OBF;
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s->outport |= KBD_OUT_MOUSE_OBF;
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s->obsrc = KBD_OBSRC_MOUSE;
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}
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}
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kbd_update_irq_lines(s);
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}
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static void kbd_safe_update_irq(KBDState *s)
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{
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/*
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* with KBD_STAT_OBF set, a call to kbd_read_data() will eventually call
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* kbd_update_irq()
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*/
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if (s->status & KBD_STAT_OBF) {
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return;
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}
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/* the throttle timer is pending and will call kbd_update_irq() */
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if (s->throttle_timer && timer_pending(s->throttle_timer)) {
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return;
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}
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if (kbd_pending(s)) {
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kbd_update_irq(s);
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}
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}
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static void kbd_update_kbd_irq(void *opaque, int level)
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{
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KBDState *s = opaque;
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if (level) {
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s->pending |= KBD_PENDING_KBD;
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} else {
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s->pending &= ~KBD_PENDING_KBD;
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}
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kbd_safe_update_irq(s);
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}
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static void kbd_update_aux_irq(void *opaque, int level)
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{
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KBDState *s = opaque;
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if (level) {
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s->pending |= KBD_PENDING_AUX;
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} else {
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s->pending &= ~KBD_PENDING_AUX;
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}
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kbd_safe_update_irq(s);
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}
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static void kbd_throttle_timeout(void *opaque)
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{
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KBDState *s = opaque;
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if (kbd_pending(s)) {
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kbd_update_irq(s);
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}
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}
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static uint64_t kbd_read_status(void *opaque, hwaddr addr,
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unsigned size)
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{
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KBDState *s = opaque;
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int val;
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val = s->status;
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trace_pckbd_kbd_read_status(val);
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return val;
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}
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static void kbd_queue(KBDState *s, int b, int aux)
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{
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if (s->extended_state) {
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s->cbdata = b;
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s->pending &= ~KBD_PENDING_CTRL_KBD & ~KBD_PENDING_CTRL_AUX;
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s->pending |= aux ? KBD_PENDING_CTRL_AUX : KBD_PENDING_CTRL_KBD;
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kbd_safe_update_irq(s);
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} else {
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ps2_queue(aux ? PS2_DEVICE(&s->ps2mouse) : PS2_DEVICE(&s->ps2kbd), b);
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}
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}
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static uint8_t kbd_dequeue(KBDState *s)
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{
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uint8_t b = s->cbdata;
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s->pending &= ~KBD_PENDING_CTRL_KBD & ~KBD_PENDING_CTRL_AUX;
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if (kbd_pending(s)) {
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kbd_update_irq(s);
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}
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return b;
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}
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static void outport_write(KBDState *s, uint32_t val)
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{
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trace_pckbd_outport_write(val);
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s->outport = val;
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qemu_set_irq(s->a20_out, (val >> 1) & 1);
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if (!(val & 1)) {
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qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
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}
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}
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static void kbd_write_command(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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{
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KBDState *s = opaque;
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trace_pckbd_kbd_write_command(val);
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/*
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* Bits 3-0 of the output port P2 of the keyboard controller may be pulsed
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* low for approximately 6 micro seconds. Bits 3-0 of the KBD_CCMD_PULSE
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* command specify the output port bits to be pulsed.
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* 0: Bit should be pulsed. 1: Bit should not be modified.
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* The only useful version of this command is pulsing bit 0,
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* which does a CPU reset.
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*/
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if ((val & KBD_CCMD_PULSE_BITS_3_0) == KBD_CCMD_PULSE_BITS_3_0) {
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if (!(val & 1)) {
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val = KBD_CCMD_RESET;
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} else {
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val = KBD_CCMD_NO_OP;
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}
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}
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switch (val) {
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case KBD_CCMD_READ_MODE:
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kbd_queue(s, s->mode, 0);
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break;
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case KBD_CCMD_WRITE_MODE:
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case KBD_CCMD_WRITE_OBUF:
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case KBD_CCMD_WRITE_AUX_OBUF:
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case KBD_CCMD_WRITE_MOUSE:
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case KBD_CCMD_WRITE_OUTPORT:
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s->write_cmd = val;
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break;
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case KBD_CCMD_MOUSE_DISABLE:
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s->mode |= KBD_MODE_DISABLE_MOUSE;
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break;
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case KBD_CCMD_MOUSE_ENABLE:
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s->mode &= ~KBD_MODE_DISABLE_MOUSE;
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kbd_safe_update_irq(s);
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break;
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case KBD_CCMD_TEST_MOUSE:
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kbd_queue(s, 0x00, 0);
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break;
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case KBD_CCMD_SELF_TEST:
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s->status |= KBD_STAT_SELFTEST;
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kbd_queue(s, 0x55, 0);
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break;
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case KBD_CCMD_KBD_TEST:
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kbd_queue(s, 0x00, 0);
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break;
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case KBD_CCMD_KBD_DISABLE:
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s->mode |= KBD_MODE_DISABLE_KBD;
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break;
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case KBD_CCMD_KBD_ENABLE:
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s->mode &= ~KBD_MODE_DISABLE_KBD;
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kbd_safe_update_irq(s);
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break;
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case KBD_CCMD_READ_INPORT:
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kbd_queue(s, 0x80, 0);
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break;
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case KBD_CCMD_READ_OUTPORT:
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kbd_queue(s, s->outport, 0);
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break;
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case KBD_CCMD_ENABLE_A20:
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qemu_irq_raise(s->a20_out);
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s->outport |= KBD_OUT_A20;
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break;
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case KBD_CCMD_DISABLE_A20:
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qemu_irq_lower(s->a20_out);
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s->outport &= ~KBD_OUT_A20;
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break;
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case KBD_CCMD_RESET:
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qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
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break;
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case KBD_CCMD_NO_OP:
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/* ignore that */
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break;
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default:
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qemu_log_mask(LOG_GUEST_ERROR,
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"unsupported keyboard cmd=0x%02" PRIx64 "\n", val);
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break;
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}
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}
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static uint64_t kbd_read_data(void *opaque, hwaddr addr,
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unsigned size)
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{
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KBDState *s = opaque;
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if (s->status & KBD_STAT_OBF) {
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kbd_deassert_irq(s);
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if (s->obsrc & KBD_OBSRC_KBD) {
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if (s->throttle_timer) {
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timer_mod(s->throttle_timer,
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qemu_clock_get_us(QEMU_CLOCK_VIRTUAL) + 1000);
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}
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s->obdata = ps2_read_data(PS2_DEVICE(&s->ps2kbd));
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} else if (s->obsrc & KBD_OBSRC_MOUSE) {
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s->obdata = ps2_read_data(PS2_DEVICE(&s->ps2mouse));
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} else if (s->obsrc & KBD_OBSRC_CTRL) {
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s->obdata = kbd_dequeue(s);
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}
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}
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trace_pckbd_kbd_read_data(s->obdata);
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return s->obdata;
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}
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|
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static void kbd_write_data(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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{
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KBDState *s = opaque;
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trace_pckbd_kbd_write_data(val);
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switch (s->write_cmd) {
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case 0:
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ps2_write_keyboard(&s->ps2kbd, val);
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/* sending data to the keyboard reenables PS/2 communication */
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s->mode &= ~KBD_MODE_DISABLE_KBD;
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kbd_safe_update_irq(s);
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break;
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case KBD_CCMD_WRITE_MODE:
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s->mode = val;
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ps2_keyboard_set_translation(&s->ps2kbd,
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(s->mode & KBD_MODE_KCC) != 0);
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/*
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* a write to the mode byte interrupt enable flags directly updates
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* the irq lines
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*/
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kbd_update_irq_lines(s);
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/*
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* a write to the mode byte disable interface flags may raise
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* an irq if there is pending data in the PS/2 queues.
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*/
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kbd_safe_update_irq(s);
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break;
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case KBD_CCMD_WRITE_OBUF:
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kbd_queue(s, val, 0);
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break;
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case KBD_CCMD_WRITE_AUX_OBUF:
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kbd_queue(s, val, 1);
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break;
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case KBD_CCMD_WRITE_OUTPORT:
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outport_write(s, val);
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break;
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case KBD_CCMD_WRITE_MOUSE:
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ps2_write_mouse(&s->ps2mouse, val);
|
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/* sending data to the mouse reenables PS/2 communication */
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s->mode &= ~KBD_MODE_DISABLE_MOUSE;
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kbd_safe_update_irq(s);
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break;
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default:
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break;
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}
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s->write_cmd = 0;
|
|
}
|
|
|
|
static void kbd_reset(void *opaque)
|
|
{
|
|
KBDState *s = opaque;
|
|
|
|
s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
|
|
s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;
|
|
s->outport = KBD_OUT_RESET | KBD_OUT_A20 | KBD_OUT_ONES;
|
|
s->pending = 0;
|
|
kbd_deassert_irq(s);
|
|
if (s->throttle_timer) {
|
|
timer_del(s->throttle_timer);
|
|
}
|
|
}
|
|
|
|
static uint8_t kbd_outport_default(KBDState *s)
|
|
{
|
|
return KBD_OUT_RESET | KBD_OUT_A20 | KBD_OUT_ONES
|
|
| (s->status & KBD_STAT_OBF ? KBD_OUT_OBF : 0)
|
|
| (s->status & KBD_STAT_MOUSE_OBF ? KBD_OUT_MOUSE_OBF : 0);
|
|
}
|
|
|
|
static int kbd_outport_post_load(void *opaque, int version_id)
|
|
{
|
|
KBDState *s = opaque;
|
|
s->outport_present = true;
|
|
return 0;
|
|
}
|
|
|
|
static bool kbd_outport_needed(void *opaque)
|
|
{
|
|
KBDState *s = opaque;
|
|
return s->outport != kbd_outport_default(s);
|
|
}
|
|
|
|
static const VMStateDescription vmstate_kbd_outport = {
|
|
.name = "pckbd_outport",
|
|
.version_id = 1,
|
|
.minimum_version_id = 1,
|
|
.post_load = kbd_outport_post_load,
|
|
.needed = kbd_outport_needed,
|
|
.fields = (const VMStateField[]) {
|
|
VMSTATE_UINT8(outport, KBDState),
|
|
VMSTATE_END_OF_LIST()
|
|
}
|
|
};
|
|
|
|
static int kbd_extended_state_pre_save(void *opaque)
|
|
{
|
|
KBDState *s = opaque;
|
|
|
|
s->migration_flags = 0;
|
|
if (s->throttle_timer && timer_pending(s->throttle_timer)) {
|
|
s->migration_flags |= KBD_MIGR_TIMER_PENDING;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int kbd_extended_state_post_load(void *opaque, int version_id)
|
|
{
|
|
KBDState *s = opaque;
|
|
|
|
if (s->migration_flags & KBD_MIGR_TIMER_PENDING) {
|
|
kbd_throttle_timeout(s);
|
|
}
|
|
s->extended_state_loaded = true;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static bool kbd_extended_state_needed(void *opaque)
|
|
{
|
|
KBDState *s = opaque;
|
|
|
|
return s->extended_state;
|
|
}
|
|
|
|
static const VMStateDescription vmstate_kbd_extended_state = {
|
|
.name = "pckbd/extended_state",
|
|
.post_load = kbd_extended_state_post_load,
|
|
.pre_save = kbd_extended_state_pre_save,
|
|
.needed = kbd_extended_state_needed,
|
|
.fields = (const VMStateField[]) {
|
|
VMSTATE_UINT32(migration_flags, KBDState),
|
|
VMSTATE_UINT32(obsrc, KBDState),
|
|
VMSTATE_UINT8(obdata, KBDState),
|
|
VMSTATE_UINT8(cbdata, KBDState),
|
|
VMSTATE_END_OF_LIST()
|
|
}
|
|
};
|
|
|
|
static int kbd_pre_save(void *opaque)
|
|
{
|
|
KBDState *s = opaque;
|
|
|
|
if (s->extended_state) {
|
|
s->pending_tmp = s->pending;
|
|
} else {
|
|
s->pending_tmp = 0;
|
|
if (s->pending & KBD_PENDING_KBD) {
|
|
s->pending_tmp |= KBD_PENDING_KBD_COMPAT;
|
|
}
|
|
if (s->pending & KBD_PENDING_AUX) {
|
|
s->pending_tmp |= KBD_PENDING_AUX_COMPAT;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int kbd_pre_load(void *opaque)
|
|
{
|
|
KBDState *s = opaque;
|
|
|
|
s->outport_present = false;
|
|
s->extended_state_loaded = false;
|
|
return 0;
|
|
}
|
|
|
|
static int kbd_post_load(void *opaque, int version_id)
|
|
{
|
|
KBDState *s = opaque;
|
|
if (!s->outport_present) {
|
|
s->outport = kbd_outport_default(s);
|
|
}
|
|
s->pending = s->pending_tmp;
|
|
if (!s->extended_state_loaded) {
|
|
s->obsrc = s->status & KBD_STAT_OBF ?
|
|
(s->status & KBD_STAT_MOUSE_OBF ? KBD_OBSRC_MOUSE : KBD_OBSRC_KBD) :
|
|
0;
|
|
if (s->pending & KBD_PENDING_KBD_COMPAT) {
|
|
s->pending |= KBD_PENDING_KBD;
|
|
}
|
|
if (s->pending & KBD_PENDING_AUX_COMPAT) {
|
|
s->pending |= KBD_PENDING_AUX;
|
|
}
|
|
}
|
|
/* clear all unused flags */
|
|
s->pending &= KBD_PENDING_CTRL_KBD | KBD_PENDING_CTRL_AUX |
|
|
KBD_PENDING_KBD | KBD_PENDING_AUX;
|
|
return 0;
|
|
}
|
|
|
|
static const VMStateDescription vmstate_kbd = {
|
|
.name = "pckbd",
|
|
.version_id = 3,
|
|
.minimum_version_id = 3,
|
|
.pre_load = kbd_pre_load,
|
|
.post_load = kbd_post_load,
|
|
.pre_save = kbd_pre_save,
|
|
.fields = (const VMStateField[]) {
|
|
VMSTATE_UINT8(write_cmd, KBDState),
|
|
VMSTATE_UINT8(status, KBDState),
|
|
VMSTATE_UINT8(mode, KBDState),
|
|
VMSTATE_UINT8(pending_tmp, KBDState),
|
|
VMSTATE_END_OF_LIST()
|
|
},
|
|
.subsections = (const VMStateDescription * const []) {
|
|
&vmstate_kbd_outport,
|
|
&vmstate_kbd_extended_state,
|
|
NULL
|
|
}
|
|
};
|
|
|
|
/* Memory mapped interface */
|
|
static uint64_t kbd_mm_readfn(void *opaque, hwaddr addr, unsigned size)
|
|
{
|
|
KBDState *s = opaque;
|
|
|
|
if (addr & s->mask) {
|
|
return kbd_read_status(s, 0, 1) & 0xff;
|
|
} else {
|
|
return kbd_read_data(s, 0, 1) & 0xff;
|
|
}
|
|
}
|
|
|
|
static void kbd_mm_writefn(void *opaque, hwaddr addr,
|
|
uint64_t value, unsigned size)
|
|
{
|
|
KBDState *s = opaque;
|
|
|
|
if (addr & s->mask) {
|
|
kbd_write_command(s, 0, value & 0xff, 1);
|
|
} else {
|
|
kbd_write_data(s, 0, value & 0xff, 1);
|
|
}
|
|
}
|
|
|
|
|
|
static const MemoryRegionOps i8042_mmio_ops = {
|
|
.read = kbd_mm_readfn,
|
|
.write = kbd_mm_writefn,
|
|
.valid.min_access_size = 1,
|
|
.valid.max_access_size = 4,
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
|
};
|
|
|
|
static void i8042_mmio_set_kbd_irq(void *opaque, int n, int level)
|
|
{
|
|
MMIOKBDState *s = I8042_MMIO(opaque);
|
|
KBDState *ks = &s->kbd;
|
|
|
|
kbd_update_kbd_irq(ks, level);
|
|
}
|
|
|
|
static void i8042_mmio_set_mouse_irq(void *opaque, int n, int level)
|
|
{
|
|
MMIOKBDState *s = I8042_MMIO(opaque);
|
|
KBDState *ks = &s->kbd;
|
|
|
|
kbd_update_aux_irq(ks, level);
|
|
}
|
|
|
|
static void i8042_mmio_reset(DeviceState *dev)
|
|
{
|
|
MMIOKBDState *s = I8042_MMIO(dev);
|
|
KBDState *ks = &s->kbd;
|
|
|
|
kbd_reset(ks);
|
|
}
|
|
|
|
static void i8042_mmio_realize(DeviceState *dev, Error **errp)
|
|
{
|
|
MMIOKBDState *s = I8042_MMIO(dev);
|
|
KBDState *ks = &s->kbd;
|
|
|
|
memory_region_init_io(&s->region, OBJECT(dev), &i8042_mmio_ops, ks,
|
|
"i8042", s->size);
|
|
|
|
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->region);
|
|
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&ks->ps2kbd), errp)) {
|
|
return;
|
|
}
|
|
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&ks->ps2mouse), errp)) {
|
|
return;
|
|
}
|
|
|
|
qdev_connect_gpio_out(DEVICE(&ks->ps2kbd), PS2_DEVICE_IRQ,
|
|
qdev_get_gpio_in_named(dev, "ps2-kbd-input-irq",
|
|
0));
|
|
|
|
qdev_connect_gpio_out(DEVICE(&ks->ps2mouse), PS2_DEVICE_IRQ,
|
|
qdev_get_gpio_in_named(dev, "ps2-mouse-input-irq",
|
|
0));
|
|
}
|
|
|
|
static void i8042_mmio_init(Object *obj)
|
|
{
|
|
MMIOKBDState *s = I8042_MMIO(obj);
|
|
KBDState *ks = &s->kbd;
|
|
|
|
ks->extended_state = true;
|
|
|
|
object_initialize_child(obj, "ps2kbd", &ks->ps2kbd, TYPE_PS2_KBD_DEVICE);
|
|
object_initialize_child(obj, "ps2mouse", &ks->ps2mouse,
|
|
TYPE_PS2_MOUSE_DEVICE);
|
|
|
|
qdev_init_gpio_out(DEVICE(obj), ks->irqs, 2);
|
|
qdev_init_gpio_in_named(DEVICE(obj), i8042_mmio_set_kbd_irq,
|
|
"ps2-kbd-input-irq", 1);
|
|
qdev_init_gpio_in_named(DEVICE(obj), i8042_mmio_set_mouse_irq,
|
|
"ps2-mouse-input-irq", 1);
|
|
}
|
|
|
|
static Property i8042_mmio_properties[] = {
|
|
DEFINE_PROP_UINT64("mask", MMIOKBDState, kbd.mask, UINT64_MAX),
|
|
DEFINE_PROP_UINT32("size", MMIOKBDState, size, -1),
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
};
|
|
|
|
static const VMStateDescription vmstate_kbd_mmio = {
|
|
.name = "pckbd-mmio",
|
|
.version_id = 1,
|
|
.minimum_version_id = 1,
|
|
.fields = (const VMStateField[]) {
|
|
VMSTATE_STRUCT(kbd, MMIOKBDState, 0, vmstate_kbd, KBDState),
|
|
VMSTATE_END_OF_LIST()
|
|
}
|
|
};
|
|
|
|
static void i8042_mmio_class_init(ObjectClass *klass, void *data)
|
|
{
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
dc->realize = i8042_mmio_realize;
|
|
device_class_set_legacy_reset(dc, i8042_mmio_reset);
|
|
dc->vmsd = &vmstate_kbd_mmio;
|
|
device_class_set_props(dc, i8042_mmio_properties);
|
|
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
|
|
}
|
|
|
|
static const TypeInfo i8042_mmio_info = {
|
|
.name = TYPE_I8042_MMIO,
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
|
.instance_init = i8042_mmio_init,
|
|
.instance_size = sizeof(MMIOKBDState),
|
|
.class_init = i8042_mmio_class_init
|
|
};
|
|
|
|
void i8042_isa_mouse_fake_event(ISAKBDState *isa)
|
|
{
|
|
KBDState *s = &isa->kbd;
|
|
|
|
ps2_mouse_fake_event(&s->ps2mouse);
|
|
}
|
|
|
|
static const VMStateDescription vmstate_kbd_isa = {
|
|
.name = "pckbd",
|
|
.version_id = 3,
|
|
.minimum_version_id = 3,
|
|
.fields = (const VMStateField[]) {
|
|
VMSTATE_STRUCT(kbd, ISAKBDState, 0, vmstate_kbd, KBDState),
|
|
VMSTATE_END_OF_LIST()
|
|
}
|
|
};
|
|
|
|
static const MemoryRegionOps i8042_data_ops = {
|
|
.read = kbd_read_data,
|
|
.write = kbd_write_data,
|
|
.impl = {
|
|
.min_access_size = 1,
|
|
.max_access_size = 1,
|
|
},
|
|
.endianness = DEVICE_LITTLE_ENDIAN,
|
|
};
|
|
|
|
static const MemoryRegionOps i8042_cmd_ops = {
|
|
.read = kbd_read_status,
|
|
.write = kbd_write_command,
|
|
.impl = {
|
|
.min_access_size = 1,
|
|
.max_access_size = 1,
|
|
},
|
|
.endianness = DEVICE_LITTLE_ENDIAN,
|
|
};
|
|
|
|
static void i8042_set_kbd_irq(void *opaque, int n, int level)
|
|
{
|
|
ISAKBDState *s = I8042(opaque);
|
|
KBDState *ks = &s->kbd;
|
|
|
|
kbd_update_kbd_irq(ks, level);
|
|
}
|
|
|
|
static void i8042_set_mouse_irq(void *opaque, int n, int level)
|
|
{
|
|
ISAKBDState *s = I8042(opaque);
|
|
KBDState *ks = &s->kbd;
|
|
|
|
kbd_update_aux_irq(ks, level);
|
|
}
|
|
|
|
|
|
static void i8042_reset(DeviceState *dev)
|
|
{
|
|
ISAKBDState *s = I8042(dev);
|
|
KBDState *ks = &s->kbd;
|
|
|
|
kbd_reset(ks);
|
|
}
|
|
|
|
static void i8042_initfn(Object *obj)
|
|
{
|
|
ISAKBDState *isa_s = I8042(obj);
|
|
KBDState *s = &isa_s->kbd;
|
|
|
|
memory_region_init_io(isa_s->io + 0, obj, &i8042_data_ops, s,
|
|
"i8042-data", 1);
|
|
memory_region_init_io(isa_s->io + 1, obj, &i8042_cmd_ops, s,
|
|
"i8042-cmd", 1);
|
|
|
|
object_initialize_child(obj, "ps2kbd", &s->ps2kbd, TYPE_PS2_KBD_DEVICE);
|
|
object_initialize_child(obj, "ps2mouse", &s->ps2mouse,
|
|
TYPE_PS2_MOUSE_DEVICE);
|
|
|
|
qdev_init_gpio_out_named(DEVICE(obj), &s->a20_out, I8042_A20_LINE, 1);
|
|
|
|
qdev_init_gpio_out(DEVICE(obj), s->irqs, 2);
|
|
qdev_init_gpio_in_named(DEVICE(obj), i8042_set_kbd_irq,
|
|
"ps2-kbd-input-irq", 1);
|
|
qdev_init_gpio_in_named(DEVICE(obj), i8042_set_mouse_irq,
|
|
"ps2-mouse-input-irq", 1);
|
|
}
|
|
|
|
static void i8042_realizefn(DeviceState *dev, Error **errp)
|
|
{
|
|
ISADevice *isadev = ISA_DEVICE(dev);
|
|
ISAKBDState *isa_s = I8042(dev);
|
|
KBDState *s = &isa_s->kbd;
|
|
|
|
if (isa_s->kbd_irq >= ISA_NUM_IRQS) {
|
|
error_setg(errp, "Maximum value for \"kbd-irq\" is: %u",
|
|
ISA_NUM_IRQS - 1);
|
|
return;
|
|
}
|
|
|
|
if (isa_s->mouse_irq >= ISA_NUM_IRQS) {
|
|
error_setg(errp, "Maximum value for \"mouse-irq\" is: %u",
|
|
ISA_NUM_IRQS - 1);
|
|
return;
|
|
}
|
|
|
|
isa_connect_gpio_out(isadev, I8042_KBD_IRQ, isa_s->kbd_irq);
|
|
isa_connect_gpio_out(isadev, I8042_MOUSE_IRQ, isa_s->mouse_irq);
|
|
|
|
isa_register_ioport(isadev, isa_s->io + 0, 0x60);
|
|
isa_register_ioport(isadev, isa_s->io + 1, 0x64);
|
|
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ps2kbd), errp)) {
|
|
return;
|
|
}
|
|
|
|
qdev_connect_gpio_out(DEVICE(&s->ps2kbd), PS2_DEVICE_IRQ,
|
|
qdev_get_gpio_in_named(dev, "ps2-kbd-input-irq",
|
|
0));
|
|
|
|
if (!sysbus_realize(SYS_BUS_DEVICE(&s->ps2mouse), errp)) {
|
|
return;
|
|
}
|
|
|
|
qdev_connect_gpio_out(DEVICE(&s->ps2mouse), PS2_DEVICE_IRQ,
|
|
qdev_get_gpio_in_named(dev, "ps2-mouse-input-irq",
|
|
0));
|
|
|
|
if (isa_s->kbd_throttle && !isa_s->kbd.extended_state) {
|
|
warn_report(TYPE_I8042 ": can't enable kbd-throttle without"
|
|
" extended-state, disabling kbd-throttle");
|
|
} else if (isa_s->kbd_throttle) {
|
|
s->throttle_timer = timer_new_us(QEMU_CLOCK_VIRTUAL,
|
|
kbd_throttle_timeout, s);
|
|
}
|
|
}
|
|
|
|
static void i8042_build_aml(AcpiDevAmlIf *adev, Aml *scope)
|
|
{
|
|
ISAKBDState *isa_s = I8042(adev);
|
|
Aml *kbd;
|
|
Aml *mou;
|
|
Aml *crs;
|
|
|
|
crs = aml_resource_template();
|
|
aml_append(crs, aml_io(AML_DECODE16, 0x0060, 0x0060, 0x01, 0x01));
|
|
aml_append(crs, aml_io(AML_DECODE16, 0x0064, 0x0064, 0x01, 0x01));
|
|
aml_append(crs, aml_irq_no_flags(isa_s->kbd_irq));
|
|
|
|
kbd = aml_device("KBD");
|
|
aml_append(kbd, aml_name_decl("_HID", aml_eisaid("PNP0303")));
|
|
aml_append(kbd, aml_name_decl("_STA", aml_int(0xf)));
|
|
aml_append(kbd, aml_name_decl("_CRS", crs));
|
|
|
|
crs = aml_resource_template();
|
|
aml_append(crs, aml_irq_no_flags(isa_s->mouse_irq));
|
|
|
|
mou = aml_device("MOU");
|
|
aml_append(mou, aml_name_decl("_HID", aml_eisaid("PNP0F13")));
|
|
aml_append(mou, aml_name_decl("_STA", aml_int(0xf)));
|
|
aml_append(mou, aml_name_decl("_CRS", crs));
|
|
|
|
aml_append(scope, kbd);
|
|
aml_append(scope, mou);
|
|
}
|
|
|
|
static Property i8042_properties[] = {
|
|
DEFINE_PROP_BOOL("extended-state", ISAKBDState, kbd.extended_state, true),
|
|
DEFINE_PROP_BOOL("kbd-throttle", ISAKBDState, kbd_throttle, false),
|
|
DEFINE_PROP_UINT8("kbd-irq", ISAKBDState, kbd_irq, 1),
|
|
DEFINE_PROP_UINT8("mouse-irq", ISAKBDState, mouse_irq, 12),
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
};
|
|
|
|
static void i8042_class_initfn(ObjectClass *klass, void *data)
|
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
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device_class_set_props(dc, i8042_properties);
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device_class_set_legacy_reset(dc, i8042_reset);
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dc->realize = i8042_realizefn;
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dc->vmsd = &vmstate_kbd_isa;
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adevc->build_dev_aml = i8042_build_aml;
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set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
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}
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static const TypeInfo i8042_info = {
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.name = TYPE_I8042,
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.parent = TYPE_ISA_DEVICE,
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.instance_size = sizeof(ISAKBDState),
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.instance_init = i8042_initfn,
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.class_init = i8042_class_initfn,
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.interfaces = (InterfaceInfo[]) {
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{ TYPE_ACPI_DEV_AML_IF },
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{ },
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},
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};
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static void i8042_register_types(void)
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{
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type_register_static(&i8042_info);
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type_register_static(&i8042_mmio_info);
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}
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type_init(i8042_register_types)
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