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163 lines
4.4 KiB
C
163 lines
4.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* NXP PCF8574 8-port I2C GPIO expansion chip.
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* Copyright (c) 2024 KNS Group (YADRO).
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* Written by Dmitrii Sharikhin <d.sharikhin@yadro.com>
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*/
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#include "qemu/osdep.h"
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#include "hw/i2c/i2c.h"
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#include "hw/gpio/pcf8574.h"
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#include "hw/irq.h"
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#include "migration/vmstate.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#include "qom/object.h"
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/*
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* PCF8574 and compatible chips incorporate quasi-bidirectional
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* IO. Electrically it means that device sustain pull-up to line
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* unless IO port is configured as output _and_ driven low.
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*
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* IO access is implemented as simple I2C single-byte read
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* or write operation. So, to configure line to input user write 1
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* to corresponding bit. To configure line to output and drive it low
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* user write 0 to corresponding bit.
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*
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* In essence, user can think of quasi-bidirectional IO as
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* open-drain line, except presence of builtin rising edge acceleration
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* embedded in PCF8574 IC
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*
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* PCF8574 has interrupt request line, which is being pulled down when
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* port line state differs from last read. Port read operation clears
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* state and INT line returns to high state via pullup.
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*/
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OBJECT_DECLARE_SIMPLE_TYPE(PCF8574State, PCF8574)
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#define PORTS_COUNT (8)
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struct PCF8574State {
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I2CSlave parent_obj;
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uint8_t lastrq; /* Last requested state. If changed - assert irq */
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uint8_t input; /* external electrical line state */
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uint8_t output; /* Pull-up (1) or drive low (0) on bit */
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qemu_irq handler[PORTS_COUNT];
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qemu_irq intrq; /* External irq request */
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};
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static void pcf8574_reset(DeviceState *dev)
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{
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PCF8574State *s = PCF8574(dev);
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s->lastrq = MAKE_64BIT_MASK(0, PORTS_COUNT);
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s->input = MAKE_64BIT_MASK(0, PORTS_COUNT);
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s->output = MAKE_64BIT_MASK(0, PORTS_COUNT);
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}
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static inline uint8_t pcf8574_line_state(PCF8574State *s)
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{
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/* we driving line low or external circuit does that */
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return s->input & s->output;
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}
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static uint8_t pcf8574_rx(I2CSlave *i2c)
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{
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PCF8574State *s = PCF8574(i2c);
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uint8_t linestate = pcf8574_line_state(s);
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if (s->lastrq != linestate) {
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s->lastrq = linestate;
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if (s->intrq) {
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qemu_set_irq(s->intrq, 1);
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}
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}
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return linestate;
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}
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static int pcf8574_tx(I2CSlave *i2c, uint8_t data)
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{
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PCF8574State *s = PCF8574(i2c);
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uint8_t prev;
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uint8_t diff;
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uint8_t actual;
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int line = 0;
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prev = pcf8574_line_state(s);
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s->output = data;
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actual = pcf8574_line_state(s);
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for (diff = (actual ^ prev); diff; diff &= ~(1 << line)) {
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line = ctz32(diff);
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if (s->handler[line]) {
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qemu_set_irq(s->handler[line], (actual >> line) & 1);
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}
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}
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if (s->intrq) {
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qemu_set_irq(s->intrq, actual == s->lastrq);
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}
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return 0;
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}
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static const VMStateDescription vmstate_pcf8574 = {
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.name = "pcf8574",
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.version_id = 0,
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.minimum_version_id = 0,
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.fields = (VMStateField[]) {
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VMSTATE_I2C_SLAVE(parent_obj, PCF8574State),
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VMSTATE_UINT8(lastrq, PCF8574State),
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VMSTATE_UINT8(input, PCF8574State),
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VMSTATE_UINT8(output, PCF8574State),
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VMSTATE_END_OF_LIST()
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}
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};
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static void pcf8574_gpio_set(void *opaque, int line, int level)
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{
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PCF8574State *s = (PCF8574State *) opaque;
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assert(line >= 0 && line < ARRAY_SIZE(s->handler));
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if (level) {
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s->input |= (1 << line);
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} else {
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s->input &= ~(1 << line);
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}
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if (pcf8574_line_state(s) != s->lastrq && s->intrq) {
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qemu_set_irq(s->intrq, 0);
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}
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}
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static void pcf8574_realize(DeviceState *dev, Error **errp)
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{
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PCF8574State *s = PCF8574(dev);
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qdev_init_gpio_in(dev, pcf8574_gpio_set, ARRAY_SIZE(s->handler));
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qdev_init_gpio_out(dev, s->handler, ARRAY_SIZE(s->handler));
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qdev_init_gpio_out_named(dev, &s->intrq, "nINT", 1);
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}
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static void pcf8574_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
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k->recv = pcf8574_rx;
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k->send = pcf8574_tx;
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dc->realize = pcf8574_realize;
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device_class_set_legacy_reset(dc, pcf8574_reset);
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dc->vmsd = &vmstate_pcf8574;
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}
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static const TypeInfo pcf8574_infos[] = {
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{
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.name = TYPE_PCF8574,
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.parent = TYPE_I2C_SLAVE,
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.instance_size = sizeof(PCF8574State),
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.class_init = pcf8574_class_init,
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}
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};
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DEFINE_TYPES(pcf8574_infos);
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