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298 lines
9.5 KiB
C
298 lines
9.5 KiB
C
/*
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* HP Diva GSP controller
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*
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* The Diva PCI boards are Remote Management cards for PA-RISC machines.
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* They come with built-in 16550A multi UARTs for serial consoles
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* and a mailbox-like memory area for hardware auto-reboot functionality.
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* GSP stands for "Guardian Service Processor". Later products were marketed
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* "Management Processor" (MP).
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*
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* Diva cards are multifunctional cards. The first part, the aux port,
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* is on physical machines not useable but we still try to mimic it here.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* Copyright (c) 2025 Helge Deller <deller@gmx.de>
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "hw/char/serial.h"
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#include "hw/irq.h"
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#include "hw/pci/pci_device.h"
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#include "hw/qdev-properties.h"
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#include "hw/qdev-properties-system.h"
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#include "migration/vmstate.h"
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#define PCI_DEVICE_ID_HP_DIVA 0x1048
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/* various DIVA GSP cards: */
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#define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049
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#define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A
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#define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B
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#define PCI_DEVICE_ID_HP_REO_IOC 0x10f1
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#define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223
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#define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226
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#define PCI_DEVICE_ID_HP_DIVA_POWERBAR 0x1227
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#define PCI_DEVICE_ID_HP_DIVA_EVEREST 0x1282
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#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290
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#define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301
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#define PCI_DEVICE_ID_HP_DIVA_HURRICANE 0x132a
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#define PCI_SERIAL_MAX_PORTS 4
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typedef struct PCIDivaSerialState {
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PCIDevice dev;
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MemoryRegion membar; /* for serial ports */
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MemoryRegion mailboxbar; /* for hardware mailbox */
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uint32_t subvendor;
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uint32_t ports;
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char *name[PCI_SERIAL_MAX_PORTS];
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SerialState state[PCI_SERIAL_MAX_PORTS];
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uint32_t level[PCI_SERIAL_MAX_PORTS];
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qemu_irq *irqs;
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uint8_t prog_if;
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bool disable;
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} PCIDivaSerialState;
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static void diva_pci_exit(PCIDevice *dev)
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{
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PCIDivaSerialState *pci = DO_UPCAST(PCIDivaSerialState, dev, dev);
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SerialState *s;
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int i;
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for (i = 0; i < pci->ports; i++) {
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s = pci->state + i;
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qdev_unrealize(DEVICE(s));
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memory_region_del_subregion(&pci->membar, &s->io);
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g_free(pci->name[i]);
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}
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qemu_free_irqs(pci->irqs, pci->ports);
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}
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static void multi_serial_irq_mux(void *opaque, int n, int level)
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{
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PCIDivaSerialState *pci = opaque;
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int i, pending = 0;
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pci->level[n] = level;
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for (i = 0; i < pci->ports; i++) {
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if (pci->level[i]) {
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pending = 1;
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}
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}
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pci_set_irq(&pci->dev, pending);
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}
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struct diva_info {
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unsigned int nports:4; /* number of serial ports */
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unsigned int omask:12; /* offset mask: BIT(1) -> offset 8 */
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};
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static struct diva_info diva_get_diva_info(PCIDeviceClass *pc)
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{
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switch (pc->subsystem_id) {
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case PCI_DEVICE_ID_HP_DIVA_POWERBAR:
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case PCI_DEVICE_ID_HP_DIVA_HURRICANE:
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return (struct diva_info) { .nports = 1,
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.omask = BIT(0) };
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case PCI_DEVICE_ID_HP_DIVA_TOSCA2:
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return (struct diva_info) { .nports = 2,
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.omask = BIT(0) | BIT(1) };
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case PCI_DEVICE_ID_HP_DIVA_TOSCA1:
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case PCI_DEVICE_ID_HP_DIVA_HALFDOME:
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case PCI_DEVICE_ID_HP_DIVA_KEYSTONE:
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return (struct diva_info) { .nports = 3,
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.omask = BIT(0) | BIT(1) | BIT(2) };
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case PCI_DEVICE_ID_HP_DIVA_EVEREST: /* e.g. in rp3410 */
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return (struct diva_info) { .nports = 3,
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.omask = BIT(0) | BIT(2) | BIT(7) };
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case PCI_DEVICE_ID_HP_DIVA_MAESTRO:
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return (struct diva_info) { .nports = 4,
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.omask = BIT(0) | BIT(1) | BIT(2) | BIT(7) };
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}
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g_assert_not_reached();
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}
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static void diva_pci_realize(PCIDevice *dev, Error **errp)
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{
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PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev);
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PCIDivaSerialState *pci = DO_UPCAST(PCIDivaSerialState, dev, dev);
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SerialState *s;
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struct diva_info di = diva_get_diva_info(pc);
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size_t i, offset = 0;
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size_t portmask = di.omask;
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pci->dev.config[PCI_CLASS_PROG] = pci->prog_if;
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pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
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memory_region_init(&pci->membar, OBJECT(pci), "serial_ports", 4096);
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pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &pci->membar);
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pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, di.nports);
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for (i = 0; i < di.nports; i++) {
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s = pci->state + i;
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if (!qdev_realize(DEVICE(s), NULL, errp)) {
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diva_pci_exit(dev);
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return;
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}
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s->irq = pci->irqs[i];
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pci->name[i] = g_strdup_printf("uart #%zu", i + 1);
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memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s,
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pci->name[i], 8);
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/* calculate offset of given port based on bitmask */
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while ((portmask & BIT(0)) == 0) {
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offset += 8;
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portmask >>= 1;
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}
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memory_region_add_subregion(&pci->membar, offset, &s->io);
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offset += 8;
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portmask >>= 1;
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pci->ports++;
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}
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/* mailbox bar */
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memory_region_init(&pci->mailboxbar, OBJECT(pci), "mailbox", 128 * KiB);
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pci_register_bar(&pci->dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY |
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PCI_BASE_ADDRESS_MEM_PREFETCH, &pci->mailboxbar);
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}
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static const VMStateDescription vmstate_pci_diva = {
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.name = "pci-diva-serial",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (const VMStateField[]) {
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VMSTATE_PCI_DEVICE(dev, PCIDivaSerialState),
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VMSTATE_STRUCT_ARRAY(state, PCIDivaSerialState, PCI_SERIAL_MAX_PORTS,
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0, vmstate_serial, SerialState),
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VMSTATE_UINT32_ARRAY(level, PCIDivaSerialState, PCI_SERIAL_MAX_PORTS),
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VMSTATE_BOOL(disable, PCIDivaSerialState),
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VMSTATE_END_OF_LIST()
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}
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};
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static const Property diva_serial_properties[] = {
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DEFINE_PROP_BOOL("disable", PCIDivaSerialState, disable, false),
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DEFINE_PROP_CHR("chardev1", PCIDivaSerialState, state[0].chr),
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DEFINE_PROP_CHR("chardev2", PCIDivaSerialState, state[1].chr),
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DEFINE_PROP_CHR("chardev3", PCIDivaSerialState, state[2].chr),
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DEFINE_PROP_CHR("chardev4", PCIDivaSerialState, state[3].chr),
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DEFINE_PROP_UINT8("prog_if", PCIDivaSerialState, prog_if, 0x02),
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DEFINE_PROP_UINT32("subvendor", PCIDivaSerialState, subvendor,
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PCI_DEVICE_ID_HP_DIVA_TOSCA1),
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};
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static void diva_serial_class_initfn(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
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pc->realize = diva_pci_realize;
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pc->exit = diva_pci_exit;
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pc->vendor_id = PCI_VENDOR_ID_HP;
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pc->device_id = PCI_DEVICE_ID_HP_DIVA;
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pc->subsystem_vendor_id = PCI_VENDOR_ID_HP;
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pc->subsystem_id = PCI_DEVICE_ID_HP_DIVA_TOSCA1;
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pc->revision = 3;
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pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL;
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dc->vmsd = &vmstate_pci_diva;
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device_class_set_props(dc, diva_serial_properties);
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set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
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}
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static void diva_serial_init(Object *o)
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{
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PCIDevice *dev = PCI_DEVICE(o);
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PCIDivaSerialState *pms = DO_UPCAST(PCIDivaSerialState, dev, dev);
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struct diva_info di = diva_get_diva_info(PCI_DEVICE_GET_CLASS(dev));
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size_t i;
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for (i = 0; i < di.nports; i++) {
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object_initialize_child(o, "serial[*]", &pms->state[i], TYPE_SERIAL);
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}
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}
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/* Diva-aux is the driver for portion 0 of the multifunction PCI device */
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struct DivaAuxState {
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PCIDevice dev;
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MemoryRegion mem;
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qemu_irq irq;
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};
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#define TYPE_DIVA_AUX "diva-aux"
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OBJECT_DECLARE_SIMPLE_TYPE(DivaAuxState, DIVA_AUX)
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static void diva_aux_realize(PCIDevice *dev, Error **errp)
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{
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DivaAuxState *pci = DO_UPCAST(DivaAuxState, dev, dev);
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pci->dev.config[PCI_CLASS_PROG] = 0x02;
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pci->dev.config[PCI_INTERRUPT_PIN] = 0x01;
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pci->irq = pci_allocate_irq(&pci->dev);
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memory_region_init(&pci->mem, OBJECT(pci), "mem", 16);
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pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &pci->mem);
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}
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static void diva_aux_exit(PCIDevice *dev)
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{
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DivaAuxState *pci = DO_UPCAST(DivaAuxState, dev, dev);
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qemu_free_irq(pci->irq);
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}
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static void diva_aux_class_initfn(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
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pc->realize = diva_aux_realize;
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pc->exit = diva_aux_exit;
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pc->vendor_id = PCI_VENDOR_ID_HP;
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pc->device_id = PCI_DEVICE_ID_HP_DIVA_AUX;
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pc->subsystem_vendor_id = PCI_VENDOR_ID_HP;
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pc->subsystem_id = 0x1291;
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pc->revision = 1;
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pc->class_id = PCI_CLASS_COMMUNICATION_MULTISERIAL;
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set_bit(DEVICE_CATEGORY_MISC, dc->categories);
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dc->user_creatable = false;
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}
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static void diva_aux_init(Object *o)
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{
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}
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static const TypeInfo diva_aux_info = {
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.name = TYPE_DIVA_AUX,
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(DivaAuxState),
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.instance_init = diva_aux_init,
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.class_init = diva_aux_class_initfn,
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.interfaces = (InterfaceInfo[]) {
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{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
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{ },
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},
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};
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static const TypeInfo diva_serial_pci_info = {
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.name = "diva-gsp",
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(PCIDivaSerialState),
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.instance_init = diva_serial_init,
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.class_init = diva_serial_class_initfn,
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.interfaces = (InterfaceInfo[]) {
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{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
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{ },
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},
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};
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static void diva_pci_register_type(void)
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{
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type_register_static(&diva_serial_pci_info);
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type_register_static(&diva_aux_info);
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}
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type_init(diva_pci_register_type)
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