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42 lines
1.0 KiB
C
42 lines
1.0 KiB
C
/*
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* Internal memory barrier helpers for QEMU (target agnostic)
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* SPDX-License-Identifier: LGPL-2.1-or-later
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*/
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#ifndef ACCEL_TCG_BACKEND_LDST_H
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#define ACCEL_TCG_BACKEND_LDST_H
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#include "tcg-target-mo.h"
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/**
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* tcg_req_mo:
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* @guest_mo: Guest default memory order
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* @type: TCGBar
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*
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* Filter @type to the barrier that is required for the guest
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* memory ordering vs the host memory ordering. A non-zero
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* result indicates that some barrier is required.
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*/
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#define tcg_req_mo(guest_mo, type) \
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((type) & guest_mo & ~TCG_TARGET_DEFAULT_MO)
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/**
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* cpu_req_mo:
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* @cpu: CPUState
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* @type: TCGBar
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*
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* If tcg_req_mo indicates a barrier for @type is required
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* for the guest memory model, issue a host memory barrier.
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*/
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#define cpu_req_mo(cpu, type) \
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do { \
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if (tcg_req_mo(cpu->cc->tcg_ops->guest_default_memory_order, type)) { \
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smp_mb(); \
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} \
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} while (0)
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#endif
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