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217 lines
7.6 KiB
C++
217 lines
7.6 KiB
C++
/*
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Copyright 2005-2014 Intel Corporation. All Rights Reserved.
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This file is part of Threading Building Blocks. Threading Building Blocks is free software;
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you can redistribute it and/or modify it under the terms of the GNU General Public License
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version 2 as published by the Free Software Foundation. Threading Building Blocks is
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distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the
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implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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See the GNU General Public License for more details. You should have received a copy of
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the GNU General Public License along with Threading Building Blocks; if not, write to the
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Free Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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As a special exception, you may use this file as part of a free software library without
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restriction. Specifically, if other files instantiate templates or use macros or inline
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functions from this file, or you compile this file and link it with other files to produce
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an executable, this file does not by itself cause the resulting executable to be covered
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by the GNU General Public License. This exception does not however invalidate any other
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reasons why the executable file might be covered by the GNU General Public License.
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*/
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#ifndef __TBB_machine_msvc_ia32_common_H
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#define __TBB_machine_msvc_ia32_common_H
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#include <intrin.h>
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//TODO: consider moving this macro to tbb_config.h and used there MSVC asm is used
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#if !_M_X64 || __INTEL_COMPILER
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#define __TBB_X86_MSVC_INLINE_ASM_AVAILABLE 1
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#if _M_X64
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#define __TBB_r(reg_name) r##reg_name
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#else
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#define __TBB_r(reg_name) e##reg_name
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#endif
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#else
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//MSVC in x64 mode does not accept inline assembler
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#define __TBB_X86_MSVC_INLINE_ASM_AVAILABLE 0
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#endif
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#define __TBB_NO_X86_MSVC_INLINE_ASM_MSG "The compiler being used is not supported (outdated?)"
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#if (_MSC_VER >= 1300) || (__INTEL_COMPILER) //Use compiler intrinsic when available
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#define __TBB_PAUSE_USE_INTRINSIC 1
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#pragma intrinsic(_mm_pause)
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namespace tbb { namespace internal { namespace intrinsics { namespace msvc {
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static inline void __TBB_machine_pause (uintptr_t delay ) {
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for (;delay>0; --delay )
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_mm_pause();
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}
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}}}}
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#else
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#if !__TBB_X86_MSVC_INLINE_ASM_AVAILABLE
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#error __TBB_NO_X86_MSVC_INLINE_ASM_MSG
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#endif
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namespace tbb { namespace internal { namespace inline_asm { namespace msvc {
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static inline void __TBB_machine_pause (uintptr_t delay ) {
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_asm
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{
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mov __TBB_r(ax), delay
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__TBB_L1:
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pause
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add __TBB_r(ax), -1
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jne __TBB_L1
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}
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return;
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}
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}}}}
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#endif
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static inline void __TBB_machine_pause (uintptr_t delay ){
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#if __TBB_PAUSE_USE_INTRINSIC
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tbb::internal::intrinsics::msvc::__TBB_machine_pause(delay);
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#else
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tbb::internal::inline_asm::msvc::__TBB_machine_pause(delay);
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#endif
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}
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//TODO: move this function to windows_api.h or to place where it is used
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#if (_MSC_VER<1400) && (!_WIN64) && (__TBB_X86_MSVC_INLINE_ASM_AVAILABLE)
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static inline void* __TBB_machine_get_current_teb () {
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void* pteb;
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__asm mov eax, fs:[0x18]
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__asm mov pteb, eax
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return pteb;
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}
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#endif
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#if ( _MSC_VER>=1400 && !defined(__INTEL_COMPILER) ) || (__INTEL_COMPILER>=1200)
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// MSVC did not have this intrinsic prior to VC8.
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// ICL 11.1 fails to compile a TBB example if __TBB_Log2 uses the intrinsic.
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#define __TBB_LOG2_USE_BSR_INTRINSIC 1
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#if _M_X64
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#define __TBB_BSR_INTRINSIC _BitScanReverse64
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#else
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#define __TBB_BSR_INTRINSIC _BitScanReverse
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#endif
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#pragma intrinsic(__TBB_BSR_INTRINSIC)
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namespace tbb { namespace internal { namespace intrinsics { namespace msvc {
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inline uintptr_t __TBB_machine_lg( uintptr_t i ){
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unsigned long j;
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__TBB_BSR_INTRINSIC( &j, i );
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return j;
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}
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}}}}
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#else
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#if !__TBB_X86_MSVC_INLINE_ASM_AVAILABLE
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#error __TBB_NO_X86_MSVC_INLINE_ASM_MSG
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#endif
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namespace tbb { namespace internal { namespace inline_asm { namespace msvc {
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inline uintptr_t __TBB_machine_lg( uintptr_t i ){
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uintptr_t j;
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__asm
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{
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bsr __TBB_r(ax), i
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mov j, __TBB_r(ax)
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}
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return j;
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}
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}}}}
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#endif
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static inline intptr_t __TBB_machine_lg( uintptr_t i ) {
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#if __TBB_LOG2_USE_BSR_INTRINSIC
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return tbb::internal::intrinsics::msvc::__TBB_machine_lg(i);
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#else
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return tbb::internal::inline_asm::msvc::__TBB_machine_lg(i);
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#endif
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}
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// API to retrieve/update FPU control setting
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#define __TBB_CPU_CTL_ENV_PRESENT 1
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namespace tbb { namespace internal { class cpu_ctl_env; } }
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#if __TBB_X86_MSVC_INLINE_ASM_AVAILABLE
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inline void __TBB_get_cpu_ctl_env ( tbb::internal::cpu_ctl_env* ctl ) {
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__asm {
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__asm mov __TBB_r(ax), ctl
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__asm stmxcsr [__TBB_r(ax)]
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__asm fstcw [__TBB_r(ax)+4]
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}
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}
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inline void __TBB_set_cpu_ctl_env ( const tbb::internal::cpu_ctl_env* ctl ) {
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__asm {
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__asm mov __TBB_r(ax), ctl
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__asm ldmxcsr [__TBB_r(ax)]
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__asm fldcw [__TBB_r(ax)+4]
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}
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}
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#else
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extern "C" {
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void __TBB_EXPORTED_FUNC __TBB_get_cpu_ctl_env ( tbb::internal::cpu_ctl_env* );
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void __TBB_EXPORTED_FUNC __TBB_set_cpu_ctl_env ( const tbb::internal::cpu_ctl_env* );
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}
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#endif
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namespace tbb {
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namespace internal {
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class cpu_ctl_env {
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private:
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int mxcsr;
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short x87cw;
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static const int MXCSR_CONTROL_MASK = ~0x3f; /* all except last six status bits */
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public:
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bool operator!=( const cpu_ctl_env& ctl ) const { return mxcsr != ctl.mxcsr || x87cw != ctl.x87cw; }
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void get_env() {
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__TBB_get_cpu_ctl_env( this );
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mxcsr &= MXCSR_CONTROL_MASK;
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}
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void set_env() const { __TBB_set_cpu_ctl_env( this ); }
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};
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} // namespace internal
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} // namespace tbb
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#if !__TBB_WIN8UI_SUPPORT
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extern "C" __declspec(dllimport) int __stdcall SwitchToThread( void );
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#define __TBB_Yield() SwitchToThread()
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#else
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#include<thread>
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#define __TBB_Yield() std::this_thread::yield()
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#endif
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#define __TBB_Pause(V) __TBB_machine_pause(V)
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#define __TBB_Log2(V) __TBB_machine_lg(V)
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#undef __TBB_r
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extern "C" {
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__int8 __TBB_EXPORTED_FUNC __TBB_machine_try_lock_elided (volatile void* ptr);
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void __TBB_EXPORTED_FUNC __TBB_machine_unlock_elided (volatile void* ptr);
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// 'pause' instruction aborts HLE/RTM transactions
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#if __TBB_PAUSE_USE_INTRINSIC
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inline static void __TBB_machine_try_lock_elided_cancel() { _mm_pause(); }
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#else
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inline static void __TBB_machine_try_lock_elided_cancel() { _asm pause; }
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#endif
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#if __TBB_TSX_INTRINSICS_PRESENT
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#define __TBB_machine_is_in_transaction _xtest
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#define __TBB_machine_begin_transaction _xbegin
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#define __TBB_machine_end_transaction _xend
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// The value (0xFF) below comes from the
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// Intel(R) 64 and IA-32 Architectures Optimization Reference Manual 12.4.5 lock not free
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#define __TBB_machine_transaction_conflict_abort() _xabort(0xFF)
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#else
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__int8 __TBB_EXPORTED_FUNC __TBB_machine_is_in_transaction();
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unsigned __int32 __TBB_EXPORTED_FUNC __TBB_machine_begin_transaction();
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void __TBB_EXPORTED_FUNC __TBB_machine_end_transaction();
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void __TBB_EXPORTED_FUNC __TBB_machine_transaction_conflict_abort();
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#endif /* __TBB_TSX_INTRINSICS_PRESENT */
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}
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#endif /* __TBB_machine_msvc_ia32_common_H */
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